Carbon 112 (2017) 142e148
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Carbon journal homepage: www.elsevier.com/locate/carbon
Effect of grain boundaries on electrical properties of polycrystalline graphene Sanghoon Park a, b, Muhammad Arslan Shehzad a, b, Muhammad Farooq Khan a, c, Ghazanfar Nazir a, c, Jonghwa Eom a, c, Hwayong Noh c, Yongho Seo a, b, * a b c
Graphene Research Institute, Sejong University, Seoul 143-747, Republic of Korea Faculty of Nanotechnology & Advanced Materials Engineering and Graphene Research Institute, Sejong University, Seoul 143-747, Republic of Korea Department of Physics and Graphene Research Institute, Sejong University, Seoul 143-747, Republic of Korea
a r t i c l e i n f o
a b s t r a c t
Article history: Received 16 August 2016 Received in revised form 20 October 2016 Accepted 7 November 2016
Since it was discovered, synthesizing large area graphene sheets by chemical or epitaxial methods is the conventional method for the application of graphene's outstanding properties. Unfortunately, CVD grown graphene is polycrystalline in nature with grain boundaries (GBs) unlike exfoliated single crystal graphene ﬂakes. These GBs are known as the main source of degrading mechanical, chemical and electrical properties of CVD graphene. Nematic liquid crystal was employed to visualize grains and boundaries and to calculate the atomic orientation of adjacent grains. Electrical performance of various GB devices was observed, and the role of grain boundaries on the ultimate electrical performance was investigated. The same work was carried out at low temperature (~7 K) to minimize the perturbation of two-dimensional electron which originated from the graphene lattice vibration. Interestingly, it was observed that there was no signiﬁcant effect of the grain boundaries on the overall electrical performance of devices even at low temperature. These results lead to the conclusion that the grain boundaries in polycrystalline graphene sheets are not the cause for degradation in the electrical performance, if the grains were stitched well at the boundary in the growth process. © 2016 Elsevier Ltd. All rights reserved.
Keywords: Polycrystalline graphene Grain boundary Electrical performance Liquid crystal Atomic orientation TEM
1. Introduction In the past decade, two-dimensional (2D) materials have received plenty of attention, especially graphene, due to its outstanding mechanical, chemical and electrical properties has become an ideal candidate for practical applications [1e4]. A lot of work has been done in order to understand the fundamental properties of these materials [5e7]. Different methods are being employed to synthesize large area graphene sheets in order to deploy them in ﬂexible, optical, and electrical devices [8e11]. Conventionally chemical vapor deposition (CVD) is used to synthesize large area graphene sheet which can be further utilized in potential applications [12,13]. It is well known that CVD grown graphene is naturally poly-crystal in nature and its mechanical, chemical and electrical properties are worse than single crystalline
* Corresponding author. Faculty of Nanotechnology & Advanced Materials Engineering and Graphene Research Institute, Sejong University, Seoul 143-747, Republic of Korea. E-mail address: [email protected]
(Y. Seo). http://dx.doi.org/10.1016/j.carbon.2016.11.010 0008-6223/© 2016 Elsevier Ltd. All rights reserved.
graphene . The degradation of these properties in polycrystalline graphene is generally known due to the grain boundaries , residues, line and point defects on the graphene sheet which commonly propagate during synthesis process. In particular, the grain boundary (GB) is known to be one of the main culprits that degrades the properties of polycrystalline graphene in theory [15,16]. As synthesized polycrystalline graphene is essential for applications, it is necessary to study how the GB affects graphene devices. In our previous work about MoS2, electrical performance of the MoS2 device was degraded by the grain boundary . In the case of graphene, however, other studies show that the grain boundary doesn't signiﬁcantly degrade electrical performance of graphene while it degrades mechanical properties of graphene [18,19]. For making the graphene GB device to study the effects of the GB device, the traditional TEM method requires time consuming steps for preparing the sample and ﬁnding out the grains' atomic orientation. The substrate of graphene sheet must be of a thickness of less than dozens on the nanoscale because of the penetration of electrons from TEM. If the atomic orientation analysis is carried out with TEM, even the top gate essentially needs to
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be fabricated on the graphene for ﬁeld effect electronic measurement, but also it's well known that fabrication of the oxide layer on the graphene is generally a task of great difﬁculty. Previously, electrical performance of single grain boundary and its adjacent two grains with exact knowledge of defects , grains orientation were studied. Conventional TEM or STM methods were used to visualize the defects which need critical sample preparation and time [18,19,21,22]. So, more critical work is required in order to simplify the visualization and knowledge of said defects. Here we report a simple method to visualize the grain and boundaries of graphene and studied the exact knowledge of grain orientation via nematic liquid crystal. We fabricate the graphene device on an adjacent two grains with one GB. Electrical performance of within single grain (SG) devices and the GB device was compared to conﬁrm the GB effect. Furthermore, we found the exact atomic orientation of each of the grains to check how the difference of the atomic orientation affects the electrical performance of the graphene device. For detecting the grains and GBs on graphene sheet, we coated the nematic phase liquid crystal (LC) and employed the polarized optical microscope (POM). This method suggests a time efﬁcient and simple approach for detecting grains and their orientation on two-dimensional materials [23e25] compared to conventional STM, TEM or other ways [18,19,21,26,27]. It can be done even without any damage to the sample. The contrast analysis was performed to ﬁnd out the atomic orientation of each graphene grains by LC and POM. Moreover, TEM was employed to conﬁrm the detailed structure of GB. As a result of transport measurement on the grain boundary and adjacent SGs, we found out that the grain boundary doesn't degrade electrical properties of polycrystalline graphene. Furthermore, the degradation of electrical performance in graphene also had no correlation with the difference of atomic orientation between adjacent two SGs, which share one grain boundary. This study would contribute to understanding the behavior of charge carriers on polycrystalline graphene sheet and the commercial application of it. 2. Result and discussion The polycrystalline graphene was grown on the Cu foil by the traditional CVD method  and PMMA layer was spin coated on the graphene sheet as a supporting polymer layer. The graphene sheet was transferred to Si/SiO2 substrate with 300 nm oxide layer after wet etching process and the PMMA layer was removed with chloroform , as shown in Supplementary Fig. S1. The nematic LC was spin coated on the sample and it was heated to 60 С for 5 min in ambient condition in order to get to the isotropic phase. The LC molecules transformed to the isotropic phase during the heating step and they were slowly cooled down to room temperature. On the cooling step, the LC molecules were transformed to the nematic phase and arranged along the direction of the grain orientation (Supplementary Fig. S2). After arrangement of the LC molecules on graphene grains, the POM with crossed polarizer and analyzer was employed to visualize and speciﬁc grains and GBs for study were selected (Supplementary Fig. S3a). The selected graphene grains and GBs were rotated in the clockwise direction and images were captured at every rotating step. Furthermore, contrast analysis was done to identify a speciﬁc grain's atomic orientation. The contrast analysis was performed via MATLAB program. Fig. S3b shows that the brightness of each grain changes periodically depending on the rotating degree of each grain. To determine the atomic orientation of each grain, PC software was employed to digitize the change of each grain's brightness. The brightness values of every grain depends periodically on speciﬁc rotating degree. Fig. S3c presents that a sinusoidal function
with p/2 period ﬁts almost completely to the whole data of each grains which have at least 100 data points (x-axis is degree and yaxis is the brightness which is digitized value of each grain's brightness). As a result, we were able to derive the crystal angle difference of atomic orientation between two grains by calculating the phase difference of two grains. Electrical properties of adjacent two SG devices and multi grain device having GB was compared. The detailed information about this method was reported in our previous work [17,24]. The detailed fabrication scheme of graphene hall bar is shown in Fig. 1. The marks were employed by scratching the graphene surface near from orange (grain 1) and blue (grain 2) grains for photolithography alignment with the POM and the homemade manipulator. Afterward, LC on the graphene surface was removed with acetone and photolithography was done for making graphene hall bar geometry (Fig. 1d). This optical image was then overlapped with both marked images before and after removing the LC by using an image-analysis program to conﬁrm the exact alignment of GB on the graphene hall bar device (Fig. 1c). Additional graphene sheet area was removed via O2 plasma RIE etching process. Photoresist (PR) on the device was removed with acetone (Fig. 1e). Further conﬁrmation of removal was done via Raman spectroscopy (Supplementary Fig. S4). Photolithography was done again to deposit Ti/Au electrodes using conventional lift off process (Fig. 1f). After these processes, electrical measurement was carried out with the knowledge of the grain's atomic orientation. To ﬁnd the angle difference between two grains, the sample was rotated under the POM setup. The transmittances of the grains were recorded as a function of rotational angle, as shown Fig. 2aeb. The angle difference was estimated from the phase differences by ﬁtting them to a sinusoidal function, and the expected grain boundary structure is illustrated in Fig. 2c. Fig. 2d presents transconductance data to measure the Dirac points at room temperature for each of the devices (within SGs and including GB). It was observed that the degradation on electrical properties of polycrystalline graphene has no correlation with the presence of GB in the device. The straight and dashed lines in the legend of Fig. 2d are arranged in descending order, depending on resistance. As we can see, even the 3e4 GB channel has the lowest resistance and 9e10 single domain channel has the highest resistance. The resistance difference in a single grain (channel 2e3, 9e10, 4e5, and 7e8) can be attributed to PMMA residue, defect, and nonuniform etching of graphene. Also, it could be related with the different channel lengths caused from the shifted alignment of 2nd photolithography (the electrodes are a little bit shifted toward top side for about 5 mm). Even considering the difference of the channel length between top side electrodes (2e5) and bottom side electrodes (7e10), the resistance of channels which have GB is lower than the channels in a SG. Furthermore, the degree of the Dirac point shifting on each channels doesn't seem to be correlated with the presence of GB. Fig. 3a presents mobility of each samples (the red triangles represent GB device and the black stars represent the adjacent single grains of the GB). For convenience, to compare the GB and its adjacent two SG devices in one sample, the black stars were arranged on the same angle of x-axis (the difference of atomic orientation) with the red triangles in the same sample. The results show that there is no clear evidence that grain boundary is degrading the electrical performance of device from over the number of 14 samples. It was veriﬁed experimentally that the resistance of the polycrystalline graphene device is not necessarily proportional to the grain size, which decides the density of grain boundaries in device . It's clear evidence that the number of grain boundaries are not correlated with the increased resistance of the device. Thus, our grains in these results seemed
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Fig. 1. The process of making graphene device which has one grain boundary. (a) The POM image with crossed polarizers of polycrystalline graphene sheet with the nematic LC. (b) The POM image with parallel polarizers of selected graphene grains with the markings for alignment. (c) The marked image and the image of graphene device with patterned PR were overlapped to conﬁrm the exact alignment. (d) A magniﬁed image of the graphene device with PR after photolithography and development process. (e) The graphene device after removing the PR and RIE etching process. (f) Ti/Au electrodes were deposited on the graphene device and their numbers were assigned. (A colour version of this ﬁgure can be viewed online.)
to be well stitched each other, without overlapping of each grains, because the resistance of the grain boundary is similar to the adjacent SGs . To clearly conﬁrm the effect of GB on the device, we performed the same experiment with another sample in the low temperature (~7 K) to exclude other thermal energy induced effects (like scattering of graphene lattice, impurities, etc.) which can make the GB effect blur and be difﬁcult to detect. Surprisingly, there is consistently no correlation with grain boundary and degradation of electrical performance, as shown in Fig. 3b (See Supplementary information S5, for detailed data). Even the SG device (grain 1) has an almost similar graph, which is hard to distinguish from each other, with the GB device. Furthermore, we investigated the difference of electrical performance between two SGs (and also at the grain boundary), to conﬁrm that grain boundary degrade electrical performance of graphene when Dirac fermions were transported from grain to other grain through the grain boundary. Results (Supplementary Fig. S8) show the overall difference of mobility is under 300 cm2/ V, no great gap of mobility was shown between two SGs and also at
the grain boundary. The scattered and irregular data show, consistently, that grain boundary has no correlation with degradation of electrical performance of graphene. On the other hand, GB were expected to remarkably alter the electronic transport in graphene, according to a theoretical study reported by others . Depending on the GB structure, two distinct transport behaviors either high transparency, or perfect reﬂection of charge carriers over large energy ranges were predicted. Moreover, electrical performance of the MoS2 device was degraded by GB . One of the clues for this discordance between graphene and MoS2, may arise from grain shape and grain boundary arrangement. The grains of graphene are irregular, while MoS2 has straight and symmetric grain boundary, in general [18,28]. In the other scenario where the degradation effects in the electrical properties are thought to be electron scattering from impurities  and also the morphology, the trapped charge and other various impacts of the substrate that can scatter the graphene's charge carriers [2,29,30]. It is well known that the contamination of graphene by the impurities is common during the transferring and the device making process. Graphene is composed of only carbon
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Fig. 2. The contrast analysis of the adjacent two grains and transconductance between the grains. Fitting results show (a) the phase difference xc of the grain 1 is 41 and (b)xc of the grain 2 is 60.85 . As the results, the difference of atomic orientation between two grains is approximately 18.15 . (c) Schematics of graphene hall bar device and its atomic orientation of the graphene grains having the honeycomb lattice. (d) Data comparison about resistance to each graphene channel. The resistance versus gate voltage data of each graphene channel are arranged in descending order. The transconductance data of GB devices are described with dashed lines. (A colour version of this ﬁgure can be viewed online.)
atoms having high structural symmetry, while transitional metal dichalcogenides (TMDs) like MoS2 have two different species of atoms with complicated structures. Thus, the dependence of crystal orientation with hexagonal lattice and the effect of the dislocation of graphene could be weaker than that of TMDs. This low selectivity of single-crystal structure of graphene could be the reason for similar electrical behavior even in the presence of the grain boundaries. This effect was opposite in the case of TMDs, where asymmetry of atomic structure due to metal and chalcogenide atoms has low compatibility at the grain boundary . In addition to these results to conﬁrm the effect of impurity like residue on GB, another device with grain boundary covered with thick polymer residue, and I-V characteristics were measured, as shown in Fig. 3d (For the details, see Supplementary information S6). In aspects of the electrical performance (mobility, I-V curves and shift of the Dirac point), contrary to expectations this sample shows that the GB device was not worse than the adjacent two SG devices despite the polymer residue covered it (Supplementary Fig. S7). This further conﬁrms the argument that GB would not affect the overall electrical performance of devices. We may consider that the polymer residue might cover the whole area of the sample and thick polymer residue was covering the GB.
However, the thick polymer residue does not seem to affect the electrical properties of graphene that were already affected by polymer residue under the thick residue. The high-resolution TEM (HRTEM) was employed to conﬁrm that the grains were well-stitched. The CVD grown graphene was transferred to a TEM grid (Supplementary Fig. S11), and Fig. 4 shows HRTEM image of a certain area and its fast Fourier transform (FFT) pattern exhibiting clear 12 dots. It means that there were two grains having different atomic orientations (~29 ) and their GB existed within this area. We investigated this area in detail by FFT analysis and the results are shown on Fig. 5. The blue areas (1e5) show the same orientation of hexagonal pattern in FFT results, and the red areas (8e10) show a different orientation of the hexagon. This implies that each colored area corresponds to a single grain region. For the purple areas (6e7) between the blue and red areas, their FFT image shows 12 dots implying that there are two different atomic orientations. Thus, the GB is expected to pass through this region. However, there is no noticeable evidence of GB in HR-TEM image in this region. This result supports that our polycrystalline graphene is well-stitched . Additionally, the other areas were inspected to ﬁnd GB using HRTEM imaging, and similar results were obtained (Supplementary Figs. S9e10.).
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Fig. 3. (a) The mobility comparison of the graphene devices with single grains and GB. For convenience sake, to compare the GB and its adjacent two SG devices in one sample, the black stars which represent the SG devices were also arranged at the same angles on x-axis (the difference of atomic orientation) with the red triangles which represent the GB devices in the same sample. (b) Transconductance of another graphene device was measured at 7 K to exclude thermal effect. (c) Optical microscopic image of a graphene device with polymer residue, and (d) its I-V characteristic curves for GB and two SGs. (A colour version of this ﬁgure can be viewed online.)
3. Conclusion In conclusion, owing to nematic liquid crystal alignment, this study suggests a simple way to fabricate graphene based devices on a single crystal area avoiding grain boundaries and other defects. The atomic orientation difference between neighboring grains visualized by POM image was an estimate of analyzing the brightness versus the rotating data. This work opens new ways to overcome the drawbacks of polycrystalline graphene caused from the grain boundary and also to apply graphene to various commercial devices. Our experimental results concluded that the electrical performance of graphene based devices are not degraded by grain boundaries in case of well-stitched CVD graphene. This work opens a new route in determining the reasons behind the degradation of electrical performance of graphene based devices. 4. Experimental 4.1. Synthesis of graphene using CVD Polycrystalline graphene was synthesized using traditional CVD processes. H2 gas (100 SCCM) ﬂowed through the chamber (diameter: 10 cm, length: 100 cm) during whole process. Cu foil (Alfa Aesar, 99.8% pure, 25 mm thick) was annealed at 1000 C for 1 h. After that CH4 gas (99.99% pure, 200 SCCM) ﬂowed through the
chamber for 20 min and the chamber was rapidly cooled down to room temperature. The CVD grown graphene on the Cu foil was then coated with PMMA-A2 950 (MicroChem) and it followed the wet transfer process mentioned in Supplementary data. 4.2. Transmittance analysis of graphene grain Commercial nematic liquid crystal (4-cyano-4-pentylbiphenyl, 5CB, Sigma Aldrich) was spin coated on graphene sheet (3000 RPM for 60 s) for detecting grains and grain boundary. For ﬁne alignment of liquid crystal on graphene surface, it was heated at 60 C for 5 min (to transform it into nematic phase) and cooled down slowly (to transform it into isotropic phase). After that, polarizer optical microscope (Olympus, BX-51) was employed to detect grains and determine exact orientation of them. Grains were rotated in clockwise direction for 360 and captured at each rotating angle. Then we conﬁrmed each grains exact orientation from all captured images which include change of each grains brightness were analyzed by MATLAB program and Origin Lab program (detailed method is well shown in our previous work ). After the analysis, nematic liquid crystal was removed by acetone. 4.3. Fabrication of graphene device for transport measurement Traditional photolithography process was done to graphene sheet for making graphene hall bar geometry. Then, Reacted Ion
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Fig. 4. HRTEM images of a certain area (a) and its FFT image (b). Inset of (b) shows that the difference of atomic orientation in two grains is about 29 . (c) The sequential TEM images with different magniﬁcations were taken to zoom-in.
Fig. 5. Detailed FFT analysis on the local areas from TEM image. The colored squares and their numbers in HRTEM image (a) correspond to the areas where FFTs (b) were obtained, respectively. The expected location of the grain boundary is indicated by a dashed line. (A colour version of this ﬁgure can be viewed online.)
etching process was employed to etch the extra graphene area with O2 plasma. After that the remained photoresist on the graphene hall bar was removed by acetone. Additional photolithography was done to the graphene hall bar again and e-beam evaporator (KOREA VACUUM TECH, KVE-E4006) was used to deposit Ti/Au (1/50 nm) electrodes. After the ﬁnal lift-off process, transport measurement was carried out to each graphene devices.
4.4. Transport measurement The Sourcemeter (Keithley 2400), Lock-in ampliﬁer (SIGNAL RECOVERY model 7265) and Multimeter (Agilent 34401a) were used to measure the electrical behavior of fabricated devices. Samples were mounted in the handmade vacuum chamber and all measurements were done under low vacuum (~103 Torr).
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Same conﬁguration was used in order to get low temperature measurement.
4.5. Characterization 
The LC alignment, grain boundaries and grain orientation were detected using polarizer optical microscope (Olympus, BX-51). Axis of polarizer and analyzer were presented as shown in the inset of the POM ﬁgures. Raman spectroscopy (RENISHAW, inVia) with excitation wavelength of 514 nm was employed to check graphene and etched area. Laser power was controlled below 1.0 mW to avoid laser-induced damage on graphene. The laser spot size of Raman spectroscopy was 1 ± 0.2 mm. Competing interest The authors declare no competing ﬁnancial interests. Author contributions statements
  
   
S.P, M.A.S, M.F.K., and G.N performed the experiments and wrote the manuscript text. J.E. and H.N. analyzed the data. Y.S. analyzed the data and wrote the discussion section. All authors reviewed the manuscript.
This research was supported by the Priority Research Centers Program (2010-0020207) through the National Research Foundation of Korea funded by the Ministry of Education, and the Human Resources Development of the Korea Institute of Energy Technology Evaluation and Planning grant funded by the Korean government's Ministry of Trade, Industry & Energy (No. 20154030200630). Also, this work was supported by the industrial research innovation program (10051701), funded by the Ministry of Trade, Industry and Energy.
Appendix A. Supplementary data
Supplementary data related to this article can be found at http:// dx.doi.org/10.1016/j.carbon.2016.11.010.
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