Improved ohmic contacts for SiC nanowire devices with nickel-silicide

Improved ohmic contacts for SiC nanowire devices with nickel-silicide

Journal of Alloys and Compounds 650 (2015) 853e857 Contents lists available at ScienceDirect Journal of Alloys and Compounds journal homepage: http:...

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Journal of Alloys and Compounds 650 (2015) 853e857

Contents lists available at ScienceDirect

Journal of Alloys and Compounds journal homepage:

Improved ohmic contacts for SiC nanowire devices with nickel-silicide Ji-Hoon Choi a, b, Edwige Bano a, *, Laurence Latu-Romain b, Maelig Ollivier a, b, Min-Kyu Joo a, c, Dae-Young Jeon a, c, Louis Fradetal a, d, Francesca Rossi e, Giovanni Attolini e a

Univ. Grenoble Alpes, IMEP-LAHC, F-38000 Grenoble, France Univ. Grenoble Alpes, LTM/CNRS, CEA-LETI, F-38000 Grenoble, France c School of Electrical Engineering, Korea University, Seoul 136-701, Republic of Korea d Univ. Grenoble Alpes, LMGP, F-38000 Grenoble, France e IMEM-CNR Institute, Parco Area delle Scienze 37/A, 43124 Parma, Italy b

a r t i c l e i n f o

a b s t r a c t

Article history: Received 7 May 2015 Received in revised form 30 July 2015 Accepted 31 July 2015 Available online 5 August 2015

The effect of annealing temperature has been investigated to obtain a low ohmic contact for silicon carbide nanowire field-effect transistor (SiC NW FET). Fabrication of two types of SiC NW FET has been studied using cylinder and needle shapes of SiC NW. The experimental results show that an annealing temperature of 650  C leads to the lowest ohmic contact resistance on SiC NW FET. It is believed that the Ni silicide phases formed on SiC NWs make low resistance ohmic contacts. Ni silicide phases begin to intrude into the SiC NW channel after an annealing step at 700  C for 30 s and consequently, it forms either a SiC/Ni silicide heterostructure or a fully Ni silicidized SiC NW depending on the channel length. A fully silicidized SiC NW exhibits a low channel resistance (740 U) and a high current density (1.46  107 A cm2 at 1.4 V). The needle shape of SiC NWs is transformed into a bead necklace like morphology after Ni silicide intrusion. © 2015 Elsevier B.V. All rights reserved.

Keywords: Nanostructured materials Semiconductors Electrical transport Diffusion

1. Introduction Silicon carbide (SiC) based nano-devices are currently attracting great interest due to its outstanding physical properties than Si, such as a wide band gap, excellent thermo-mechanical properties, chemical inertness and biocompatibility [1,2]. To achieve excellent performance of SiC nano-devices, it is needed to improve two main issues: the fabrication of high quality SiC nanostructure itself and the contact properties. Conventionally, fabricated SiC nanowires (NWs) by bottom-up methods significantly suffer from a high density of structural defects, such as stacking faults [3]. This kind of structural defect leads to poor electrical performance of SiC NW based devices, such as weak gate effect and low mobility [4,5]. Therefore, it may be developed another approach (such as topdown approach) to fabricate the SiC nanostructures [6,7], which significantly reduces the density of stacking faults. At the same time, as devices size is scaled down into nanometer region, the channel resistance of NWs becomes sufficiently small [8].

* Corresponding author. E-mail address: [email protected] (E. Bano). 0925-8388/© 2015 Elsevier B.V. All rights reserved.

Therefore, the source/drain (S/D) contact properties become an important issue and determine the device performance. To minimize S/D contact resistance, many efforts have been done to tailor the interface between the metal and NWs by changing the metal species and optimizing the annealing conditions. However, the contact property of SiC nano-devices has not been investigated in much detail relative to that of Si nano-devices. Most studies report that Ni is the best material for good ohmic contacts to n-type SiC substrate because it forms silicide with SiC at elevated temperatures [9]. Jang et al. [4] have shown that Ni/Au ohmic contacts on SiC NWs had the lower specific contact resistances compare to the values of Ti/Au ohmic contacts. It is believed that all phases of Ni silicides formed by silicidation provide low resistivity ohmic contacts by modifying the interface between the metal and semiconductor interface. However, the contact property of SiC nano-devices according to annealing temperature has not been systematically studied yet. In the present study, the electrical transport properties of SiC nano-devices and Ni silicidation behavior have been investigated according to the annealing temperature.


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2. Material and methods The cylinder shape of SiC NWs used in this study were prepared on a silicon wafer by the vaporeliquidesolid (VLS) method using Ni clusters as the catalyst, which has been presented elsewhere [10]. As-grown SiC NWs are predominantly 3C polytype with <111> growth axis with diameters ranging from 40 to 80 nm and lengths greater than 5 mm (see Fig. 1(a)). The needle shape SiC NWs used in section 3.3 study were presented elsewhere [11]. The diameters of needle-like SiC NWs are found to decrease from the root (~80 nm) to the tip (~several nm) (see Fig. 1(b)). In order to fabricate devices, Ni catalyst on the SiC NWs was removed from using successive dipping in diluted hydrofluoric acid (HF e 5%, 1 min), aqua regia (3 min) and HF (5%, 1 min). And then, SiC NWs diluted in isopropyl alcohol were dispersed onto highly ndoped (1020 cm3) Si substrate covered with a 280 nm thick SiO2 layer, which served as a gate dielectric layer. E-beam lithography was used to define the S/D contacts. After development, the native silicon oxide surrounding the NWs was removed by dipping in HF (5%, 5 s) and Ar ion (250 V, 15 s) etching prior to the metal deposition (Ni 50 nm/Au 50 nm) using an e-beam evaporator. After a liftoff step, O2 plasma (350W, 60 s) treatment was performed to remove the remaining photoresist and other organic materials. Finally, annealing step was carried out ranging from 500 to 750  C for 30 s with ambient N2 in a rapid thermal annealer (Jetfirst 100). The temperature ramp rate was set to reach a desired temperature within 30 s. Electrical properties of devices were measured at room temperature and in ambient air with a Keithley 4200 semiconductor characterization system. A field emission scanning electron microscope (SEM) in combination with energy-dispersive X-ray spectrometry (EDX) was used to study the morphology and the chemical composition of devices.

3. Results and discussion 3.1. Contact property according to annealing temperature The effect of annealing temperature on the contact properties of SiC NW FET has been investigated between 500 and 650  C. Fourpoint probe configuration in Fig. 2(a) inset is performed to characterize the electrical resistivity and contact properties of SiC NW FET. The length between each electrode is 500 nm, the width of metal electrode is 300 nm. Fig. 2 shows a currentevoltage (IeV) curve of two-point terminal devices according to the annealing temperature, which is taken by varying the voltage (V2e3) and measuring current (I2e3) at the inner electrodes. The current (I2e3) in the NW increases with increasing

annealing temperature, which means the decrease of the total NW resistance (Rtot). The optimum annealing temperature resulting in the highest current level has been found to be 650  C. The linear behavior of IeV curves at 650  C demonstrates an ohmic contact between a single SiC NW and the Ni/Au electrodes. The total NW FET resistance (Rtot), which is defined as the zerobias slope of the inverse of the IeV dependence, is 11.56 MU at 650  C. And the channel resistance (RNW) evaluated by the fourprobe measurement is 10.80 MU at 650  C, as shown in Fig. S1. The contact resistance (RC) of a device at 650  C calculated by the following equation (Eq. (1)) is 378 kU

RC ¼ ðRtot  RNW Þ=2


It is well known that Ni-based ohmic contacts on SiC is improved with increasing annealing temperature by forming nickel-silicide phases [9]. Therefore, it needs to be investigated the contact property of SiC NW FET above 650  C to further improve ohmic contact resistance. 3.2. Ni silicide intrusion into SiC NWs The annealing temperature is further increased up to 700  C to decrease ohmic contact resistance of NW FET. Fig. 3(a) shows SEM images of a Ni silicided SiC NW FET after annealing at 700  C during 30 s. A clear contrast difference in Fig. 3(a) inset is observed between the unreacted SiC NW (dark sections) and the formed metallic Ni silicided SiC NW (bright sections). The Ni silicide intrusion emerging from the metal electrode partially converts the SiC into Ni silicide phases by solid state reaction. However, Ni silicide intrusion on the other contact side is not observed, it might be attributed to amorphous SiO2 formed on SiC NWs. The existence of an insulating oxide layer on the surface of the SiC NW prevents Ni silicide intrusion into the channel, and consequently it leads to low current level and non-ohmic behavior (see Fig. S2). The Ni diffusion length in Fig. 3(a) inset after annealing at 700  C during 30 s is around 1.6 mm. If the channel length of SiC NW FET is shorter than Ni silicide intrusion length, SiC NW is completely converted into Ni silicided SiC NW, as shown in Fig. 3(b) and (c). EDX mapping in Fig. 3(c) have indeed confirmed the presence of Ni in the channel. The formation of metallic Ni silicided SiC NW during the annealing is further confirmed by two-probe electrical transport study, as shown in Fig. 3(d). The electrical property of high current, low resistance and perfect ohmic contact behavior before the breakdown point of device at 1.3 V obviously show the metallic behavior of Ni silicided SiC NWs. The fully Ni silicidized SiC NW (expanded diameter ~95 nm due to Ni silicide intrusion) can carry

Fig. 1. SEM image of (a) a cylinder shape and (b) a needle shape of SiC NWs.

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Fig. 2. (a) The I2e3eV2e3 curve measured at the inner electrodes as a function of the annealing temperature (inset: a SEM image of four-point measurement, the scale bar is 400 nm), (b) a magnified view of the I2e3eV2e3 curve.

Fig. 4. Temperature of Ni silicide intrusion into group IV semiconductors NWs.

Fig. 3. SEM images of a silicided SiC nano FET after annealing at 700  C during 30 s, (a) SiCeNi silicide heterostructures by silicidation (inset: a magnified images of Ni silicide intrusion part, the scale bars is 300 nm), (b) SEM and (c) the corresponding Ni EDX mapping image of completely transformed Ni silicided SiC NW. (The scale bars in (b, c) are 400 nm), (d) the IeV curve of fully Ni silicided SiC NW.

the current up to 1.32 mA, which gives a current density exceeding 1.46  107 A cm2. The estimated Rtot and RNW of fully silicidized SiC NWs is around 1 kU and 740 U, respectively, from the four-point probe configuration (Fig. S3). Ni silicide intrusion into the NW's channel was widely observed in other group IV semiconductors NWs, such as Ge [12], Si [13e16],

GeeSi coreeshell NWs [17]. However, Ni silicide intrusion into SiC NWs is for the first time reported in the present study. Ni silicide intrusion temperature into SiC NW (700  C) is significantly higher than that of other group IV semiconductors NWs (Si: 400e550  C and Ge: 400  C), as shown in Fig. 4. It is believed that Ni diffusion rate into SiC is low due to the high binding energy between carbon and silicon and the dense packed atomic structure of SiC [18]. Ni silicide intrusion into the SiC NW channel had not been observed at high temperature annealing (700  C) in Ref. [4], even though they obtained low ohmic contact resistance (8.2 ± 0.2 kU). It was believed that amorphous SiO2 formed on SiC NWs acts as a barrier for the Ni silicide intrusion. The removal processes of amorphous SiO2 surrounding SiC NWs (the combination of HF treatment Ar ion gun etching) before metal deposition are indeed crucial to obtain the Ni silicide intrusion into SiC NWs. The reaction of Ni with bulk SiC has been fully investigated as a function of annealing temperature [9,19e21]. In a previous study on Ni-based contacts on a 3CeSiC substrate [9], Ni remained unreacted after annealing up to 600  C. Further annealing at 750 and 850  C, a coexistence of the Ni5Si2 and the Ni2Si phase was observed by X-ray diffraction (XRD). After annealing at 950  C, the most thermodynamically stable phase (Ni2Si) was detected. It is normally required a high temperature annealing in the range of 900e1000  C to get a stable Ni-based ohmic contact on SiC with high-reliability. In case of SiC nanostructures, all phases of Ni silicide formed during the annealing is easily diffused into a confined SiC NW channel. As a result, the maximum annealing temperature on SiC nano-devices is


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limited by the Ni silicide intrusion into the channel. The Ni silicide intrusion behavior in Si NWs had been systematically studied by in situ TEM [15]. However, Ni silicidation on SiC materials is a little bit more complicated than Si. Detail Ni silicide of a stoichiometric composition in SiC NW has not been investigated in this study. But, it is known that Ni predominantly reacts with Si and forms the Si-rich Ni silicide when SiC is consumed by the solid state reaction with Ni metal. Whereas unreacted carbon atoms tend to precipitate into (graphite-like) carbon clusters instead of forming carbides, as described by the following equation (Eq. (2)) [20,21].

SiC þ Ni/Nix Siy ðNi silicidesÞ þ CðgraphiteÞ


It is also known that a segregated carbon clusters in SiC introduce an electron trap below the conduction band edge, which leads to stable ohmic contact formation through the reduction of effective Schottky barrier height [22,23]. 3.3. Ni silicide intrusion behavior with different shapes of SiC NWs Many studies have been reported about the Ni silicidation on cylinder shape of group IV semiconductors NWs [12e17]. However, to the best of our knowledge, there has been no study of the silicidation process on any other morphology of NWs. Among various shapes of SiC NWs, the needle shape of SiC NWs has proved to be well suited for field electron emission applications [24]. Needle shape of NWs could also be used as building block for fabrication of

advanced electronic devices, because of their unique electrostatic characteristics due to the asymmetric diameter along the NWs [25]. Therefore, it is worthwhile to investigate the Ni silicidation on SiC NWs with a needle shape. Fig. 5 shows SEM images and schematic illustrations of cylinder and needle shapes of SiC NWs with Ni silicide intruded contacts after annealing at 700  C for 30 s. As reported earlier, the Ni silicide progressively and uniformly diffuses into the SiC NW channel during the silicidation process in Fig. 5(c) side-view. A curved section is observed near the metal electrode in Fig. 5(a), which is comparable to the results reported elsewhere [14,26]. The intrusion of Ni silicide into SiC NWs roughly increases the volume around by 25% (3CeSiC: a ¼ 4.3596 Å and NiSi2: a ¼ 5.406 Å). As a result, a straight SiC NWs is transformed into a curved SiC NWs due to the induced strain by the volume expansion as depicted in Fig. 5(c) top-view. The Ni silicidation on needle shape SiC NW shows different intrusion behavior because the diameter of NW is reduced toward the tip apex. In case of cylinder SiC NW, the consumption rate of SiC by the solid state reaction and the Ni silicide intrusion rate is balanced along the channel. On another hand, the consumption rate of SiC in needle shape SiC NW is decreased toward the tip apex while the Ni silicide intrusion rate is constant. As a result, Ni silicide grows in a radial direction together with the axial direction, as depicted in a magnified picture in Fig. 5(d) side-view. When the Ni silicide intrusion rate is much larger than the consumption rate of

Fig. 5. SEM images of Ni silicide intrusion into (a) the cylinder and (b) the needle shape of SiC NWs after annealing at 700  C during 30 s (Inset: a magnified images of the apex of needle SiC NW, The scale bar in inset of b ¼ 100 nm), schematic illustration of the diffusion process of Ni silicide into (c) the cylinder and (d) the needle shape of SiC NWs. (Top-view: dash e before annealing and filed e after annealing).

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SiC, it reaches a very high degree of supersaturation. Consequently, the Ni silicide will precipitate in shape of the droplet. Therefore, periodic precipitation of Ni silicide leads to the formation of the bead necklace like morphology in Fig. 5(b) and (d) top-view. When the annealing temperature is further increased up to 750  C, SiC NWs are completely broken due to volume expansion induced by Ni intrusion (Fig. S4). Ni based silicidation is a key process to guarantee the stability and repeatability of ohmic contact by tailoring the metalsemiconductor interface. In addition, the longitudinal Ni-silicide formation at the both ends of a SiC NW (Ni silicide/SiC/Ni silicide heterostructure) can provide controlled injection geometry with carrier transfer coming atomically sharp epitaxial interfaces between Ni silicide and SiC [13,26]. Hence, the silicidation process can reduce the Fermi level pinning effect due to the suppression of the surface state. Precisely controlled Ni silicide diffusion along the NW's channel can allow the fabrication of ultra-short channel transistors [27], which is beyond lithography limitations. To further exploit excellent electrical property of SiC NWs, other silicidation materials and their silicide-SiC heterostructures, which have been done in Si NWs (such as Pt [26], Co [28] and Mn [29] should be investigated. 4. Conclusions Ni based contact property on SiC NW FET has been investigated as a function of the annealing temperature. Low resistivity ohmic contacts have been obtained after the annealing at 650  C. Ni silicide begins to intrude into SiC NWs channel after annealing at 700  C. This temperature is compared to one of other group IV materials. It has been demonstrated a SiCeNi silicide heterostructures and a fully Ni silicided SiC NW by the intrusion of Ni silicide after annealing at 700  C for 30 s depending on the channel length. It is interesting that Ni intrusion into needle shape of SiC NWs results in the bead necklace like morphology due to the reduction of diameter toward the tip apex. Acknowledgments The authors thank the staffs of the Plateforme Technologique Amont (PTA), Grenoble, France for their technical support. In particular, J. H. Choi would like to thank Jean-Luc Thomassin, Guillaume Rosaz, Bassem Salem and Prof. S. K. Lee (Chonbuk Uni., South Korea) for device fabrication and fruitful discussions. G.Attolini would like to thank Dr. M. Bosi for his help in nanowires growth. This work was partly supported by European projects NANOFUNCTION. Appendix A. Supplementary data Supplementary data related to this article can be found at http:// References [1] K. Zekentes, K. Rogdakis, SiC nanowires: material and devices, J. Phys. D Appl. Phys. 44 (2011) 133001e133018. [2] R. Wu, K. Zhou, C.Y. Yue, J. Wei, Y. Pan, Recent progress in synthesis, properties and potential applications of SiC nanomaterials, Prog. Mater. Sci. 72 (2015) 1e60. [3] H.K. Seong, H.J. Choi, S.K. Lee, J.I. Lee, D.J. Choi, Optical and electrical transport properties in silicon carbide nanowires, Appl. Phys. Lett. 85 (2004)


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