Scanning probe microscopy in semiconductor failure analysis

Scanning probe microscopy in semiconductor failure analysis

Microelectronics Reliability 41 (2001) 1231±1236 Scanning probe microscopy in semiconductor failure analysis B. Ebe...

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Microelectronics Reliability 41 (2001) 1231±1236

Scanning probe microscopy in semiconductor failure analysis B. Ebersberger *, A. Olbrich, C. Boit In®neon Technologies AG, P.O. Box 800949, 81609 Munich, Germany Received 9 October 2000; received in revised form 23 February 2001

Abstract Scanning probe microscopy (SPM) is still a relatively new tool in semiconductor failure analysis (FA). But within the last few years it has developed into an essential imaging method for process control and failure analysis due to its unique features and high adaptability. Atomic force microscopy is indispensable whenever three-dimensional and quantitative surface information combined with unsurpassed resolution is needed. New electrical SPM techniques o€er previously inaccessible insights into the nanoscopic construction of semiconductors. They provide for the ®rst time twodimensional maps of various physical parameters like oxide thickness, doping, temperature or current at sub-micron to nanometer resolution. By this SPM greatly enhances the possibilities of FA to ®nd faults and control processes. Ó 2001 Elsevier Science Ltd. All rights reserved.

1. Introduction Semiconductor failure analysis (FA) relies strongly on microscopic imaging techniques. The fast evolution of semiconductor chip generations to smaller and smaller feature sizes poses quite a challenge to keep analysis techniques up to date with current technology. In any FA laboratory scanning electron microscopy (SEM) has been and still is the main tool to visualize semiconductors in order to control processes and identify failures. The resolution of the best SEM's available today is below 1 nm and thus sucient for most cases of failure analysis now and for the next years. When extremely small features have to be resolved, like thin layers, which are only a few atoms across, transmission electron microscopy (TEM) o€ers still improved resolution, but at the expense of tedious and time consuming sample preparation. Due to the common availability of these high resolution microscopes there has, at ®rst, not been much need for a new technique like scanning probe

microscopy (SPM), which is quite slow and at least for the traditional SEM-accustomed user ± less direct than the life-image o€ered in electron microscopy. The advantages of SPM techniques had ®rst to become evident for a more widespread application. Perhaps SPM's most important asset, is its adaptability to various measurement needs. Based on atomic force microscopy (AFM) more and more derivative techniques have recently been developed which allow to visualize physical properties that had in the past either not been accessible at all or at least not for mapping in two dimensions and with nanometer resolution. Doping, electrical conductivity, surface potential, temperature and current ¯ow are examples for this. In our lab at In®neon Technologies ± formerly Siemens Semiconductor it was the need for such a new imaging technique (conducting-AFM) which about four years ago led to the introduction of SPM for microscopic oxide characterization.

2. What is semiconductor failure analysis about? *

Corresponding author. Address: In®neon Technologies AG, CFE PT TC P, Otto-Hahn-Ring 6, D-81739 M unchen, Germany. Tel.: +49-89-234-53281; fax: +49-89-234-49319. E-mail address: [email protected]® (B. Ebersberger).

To give a brief background, the task of semiconductor FA is localization and identi®cation of failures or deviations from the ideal chip construction, which, e.g., can lead to reduced reliability. This includes process control, manufacturing equipment control and chip

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construction analysis. The results of FA are indispensable for technology development, design veri®cation, product development and manufacturing. FA relies on various imaging techniques of di€erent physical properties. Often fault localization cannot be done by electrical testing alone, so physical techniques come into play. Examples of such techniques are liquid crystal thermography that detects increased temperature caused by electric shorts and photo emission microscopy [1] that yields images of the IR radiation due to carrier recombination or acceleration at fail sites. Preparation techniques like top down deprocessing or cross-sectioning allow us to expose, image and identify failures or analyze the construction of a semiconductor device. Imaging is usually done with the SEM and, much less often, with TEM. Optical microscopy is still important but, due to the limited resolution, is restricted to controlling deprocessing steps or inspecting large scale failures.

is important. Additionally, the scan range in SPM is limited to about 100 lm. The image acquisition also appears to be more indirect than in an SEM, where a life image gives the impression of directly looking at the sample similar to an optical microscope. A SEM image may appear more reliably ``true'' to the analyst, when it is crisp and sharp and exhibits good contrast. Compared to SEM, the AFM image seems to be more indirectly ``computer generated'', even though the SEM image likewise is the result of putting together point by point the local secondary electron yield ± also a rather abstract quantity. But still SPM does not allow focussing, tracking of the surface can be imperfect and many scan artifacts can be introduced, which are often much less obvious than an out-of-focus image. 4. Examples of SPM in semiconductor failure analysis 4.1. Topography

3. Advantages and disadvantages of SPM for semiconductor failure analysis SPM adds many imaging possibilities to traditional FA techniques. Since AFM measures quantitatively it is used whenever a surface must be imaged in full threedimensionality and/or when statistical interpretation of the data is needed. The latter can be the calculation of roughness values, grain size, determination of average step heights, maximum height or depth of features and more. Also, the unsurpassed resolution of AFM, especially in the vertical direction, gives it an advantage over SEM and even TEM when slight surface variations are to be detected. AFM images are unambiguous about the topography.There is no misinterpretation possible about which features are higher or lower and there is no mixing-in of buried sample layers into the measured image. SPM can o€er solutions when several other physical properties are to be imaged in two dimensions and with nanometer resolution. Such properties are, for example, doping, dielectric insulation (conductivity), electric potential, temperature etc. In these cases, no comparable imaging is possible by other means, even though other methods may have advantages in speci®c aspects. SPM is conceptionally simple, low-cost when compared to alternative methods and easy to implement as nowadays mature and reliable equipment is commercially available. On the other hand there are several drawbacks of SPM methods in everyday FA applications. The ®rst is the slow image acquisition, mostly it takes several minutes to complete one image. Searching for some feature on an extended area can take hours when no point of reference is available, so prelocalization by other means

AFM yields true three-dimensional surface mapping with unsurpassed resolution. The vertical resolution is in the Angstrom range. Thus, minute height variations on ¯at surfaces can be measured to assess ¯atness, roughness or scratches. The three-dimensional and calibrated data allows statistical data evaluation to give quantitative results for roughness, step heights, grain sizes, slope angles, depths etc. After an image is taken and stored, cross-sections of the surface topography can be taken in arbitrary directions and any features can be easily measured by putting markers on the surface sites. Regular or repetitive features can be averaged to give more reliable data than single measurements. For example, step height is more accurate when averaged over a certain area as compared to a single two-dimensional crosssection prepared for SEM analysis. By looking at the distribution of the data, the variation of the interesting measure can also be assessed. Perhaps the best example of the strengths of AFM imaging is process control of chemical mechanical polishing (CMP). This technique is now indispensable in semiconductor processing to planarize the semiconductor surface at various process steps. Without planarization high resolution lithography, with its limited depth of focus, could no not be applied. Tungsten-CMP is used in the formation of contacts between di€erent wiring layers (damascene process). After the contacts or via holes are etched into the dielectric, the holes and the surface are completely covered with tungsten. With CMP then the tungsten is selectively polished away until the dielectric is exposed again, leaving the contact holes ®lled. Depending on the slurry, tungsten-CMP has a much slower removal rate for silicon oxide so that a ¯at surface between the dielectric and the ®lled contact holes

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Fig. 1. AFM image of tungsten plugs after CMP and height histogram. Scan size ˆ 10 lm.

is left. But, due to the higher removal rate of the tungsten and some elasticity of the polishing pads, the tungsten within the contact is carved out a few nanometers below the oxide surface. This e€ect is is called ``dishing''. Dishing has to be minimized and depends on many polishing parameters as well as on the diameter and spacing of the tungsten plugs. Fig. 1 shows an AFM image of several tungsten contacts after CMP. The oxide surface is scratched by the abrasive particles used in the process. The dishing of the plugs is clearly visible. A cross-section through this image reveals that the dishing is quite irregular. In order to correlate the dishing with the process parameters, it is much more helpful to calculate a statistical depth value derived from the height distribution of the image. The right hand side of Fig. 1 shows a sharp gaussian distribution of the oxide surface and a wider distribution of the bottom of the tungsten plugs. By measuring dishing (and ``erosion'', another important CMP characteristic) as a function of various process parameters a model of the resulting surface topography could be established [2]. This allowed in turn to optimize the CMP process. The many scratches left after W-CMP have to be removed by short oxide-CMP ``touch-up''. This again is controlled by AFM. Another example where the high resolution of AFM is exploited is shown in Fig. 2. The gate oxide of an EEPROM transistor has been exposed by selective etching in KOH with selectivity >1000:1. The bending in the surface is due to the LOCOS process (local oxidation of silicon) and leads to a groove at the edge to the surrounding thick ®eld oxide. The depth of the groove can be accurately measured with AFM and can give some

insight in possible reliability problems due to oxide thinning. But for an evaluation of the real thickness additional techniques have to be applied (see Section 4.2). The ridges on the oxide surface are about 1±2 nm high and re¯ect the grain structure of the removed poly gate. They are due to increased oxidation below grain boundaries and were also found in TEM cross-sections. Here the main advantages of AFM, as compared to TEM, are its ease of application and its three dimensional mapping capability of the surface. With AFM, the complete edge of the gate oxide can be investigated, while TEM o€ers only a cross-section along a single line. The resolution of AFM is even better than TEM, because the latter averages over several tens of nanometers thickness of the sample. On the other hand, AFM alone cannot see the bottom side of the oxide. For that purpose, another advanced SPM technique has been developed (see Section 4.2). In daily FA work, some seemingly trivial AFM tasks are also often requested. These are, e.g., measurement of laser dots which are used for scribing wafer numbers on a wafer or determining the maximum depth of contact pad imprints caused by probe needle touch down. Here AFM o€ers the easiest way to obtain the required information. 4.2. Local current±voltage measurements (C-AFM) The above example of a gate oxide weakness at the border to the ®eld oxide showed that for the evaluation of oxide integrity the surface topography alone is not sucient [3]. The electrical insulating property of a


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Fig. 2. AFM image of EEPROM transistor gate oxide produced with LOCOS process.

dielectric is best tested electrically. For that purpose, the AFM is used as a nanoscopic probe station. A voltage is applied across the bare oxide using the sample substrate as back contact and a conductive probe tip, with only a few nanometer radius, as top contact. The voltage is adjusted so that a tunneling current through the oxide just sets in and this current is measured with a sensitive pA ampli®er and recorded along with the topography. This method, called conducting-AFM (C-AFM), also allows the recording of local I±V curves. These are ®tted to the Fowler±Nordheim tunneling equation yielding the local oxide thickness with 0.1 nm relative and 0.3 nm absolute accuracy [4]. Using the parameters from these I±V curves, a tunneling current map taken with C-AFM can be converted into a thickness map. The lateral resolution is about 10 nm. Again the great value of the method lies in its two-dimensional mapping combined with nanometer resolution and in the fact that the electrical instead of the geometric oxide thickness is measured, which is the decisive parameter for MOS transistor operation. As an example, Fig. 3 shows the current through the tunneling oxide of an EEPROM storage transistor [5]. This cell exhibited insucient data retention in electrical tests. The reason for this was found to be the leaking tunneling oxide, as seen in Fig. 3. The neighboring reference oxide shows no current at this voltage (not shown). We now use C-AFM routinely to image oxides, compare macroscopic reliability data from dielectric

Fig. 3. C-AFM current map of the tunneling oxide of an EEPROM transistor with bad data retention. It shows leakage through the oxide while the neighboring reference cell (not shown) yielded no current at that voltage.

stress tests with microscopic oxide structure and for the characterization of new ultra-thin oxides. A more detailed presentation of C-AFM is given in Refs. [3±6].

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Fig. 4. SCM cross-section through a bipolar transistor with incomplete base implant due to a mask failure.

4.3. Doping Doping is a key component of semiconductor materials just like insulating and conducting materials but much more dicult to make visible. SIMS can accurately measure doping depth pro®les (one-dimensional) but needs large-area test structures. Lateral SIMS can extend this to a second dimension but also needs special test structures and is very tedious to perform [7]. Only SPM methods, like scanning capacitance microscopy (SCM) [8] and scanning spreading resistance microscopy [9], are capable of directly imaging doping distributions near the sample surface. Thus two-dimensional doping distributions can be obtained either in top view or crosssection. To be more accurate: it is not truly the doping atoms that are imaged but the distribution of the free charge carriers. This gives rise to a number of complications caused by the mobility of these carriers and makes these measurement more dicult to interpret as compared to SIMS pro®ling. With SCM doping levels between 1015 and 1019 cm 3 can be resolved. The quanti®cation of the data though is dicult and depends on many measurement parameters. This topic is a subject of current research, e.g. at the University of Hamburg which cooperates with us for that purpose. An example is given in Fig. 4. A bipolar transistor showed leakage between collector and emitter, while a neighboring transistor of the same type behaved normally. The SCM image shows that in the failing transistor the base region has not been implanted entirely due to a mask failure.

Electric IC testing by contact or non-contact AFM probing also is a highly important subject for failure analysis. It can avoid time consuming preparation of test points with focussed ion beam or in some cases can even replace costly e-beam testers when chip signals have to be accessed directly. Additionally contact SPM not only allows to measure but also to force signals into nodes of a circuit, which is not possible with non-contact, including electron beam based methods. Commercial systems for IC testing are just about to emerge. Another highly interesting application for SPM is the measurement of currents in conducting lines on a chip via their magnetic ®elds [11]. For this application no alternative non-SPM technique with comparable lateral resolution is available. All these electrical analysis techniques rely on SPM equipment that can mechanically access the chip surface in a locally opened package so that the chip can be operated during the SPM test. These new topics are under development at the Universities of Hamburg, Duisburg and Wuppertal, in collaboration with our lab and funded by the German research ministry (BMBF).

5. Conclusion SPM has entered semiconductor FA only a few years ago and is now already a well established technique. At the same time new derivative methods are under development which will further improve our means to localize and analyze semiconductor faults.

References 4.4. IC testing Scanning thermal microscopy allows the measurement of local temperature distributions on a semiconductor surface. This technique is interesting for a higher resolution failure localization after localization using liquid crystal thermography [10].

[1] K olzer J, Boit C, Dallmann A, Deboy G, Otto J, Weinmann D. J Appl Phys 1992;71:R23. [2] Elbel N, Neureither B, Ebersberger B, Lahnor P. J Electrochem Soc 1998;145(5):1659. [3] Ebersberger B, Boit C, Benzinger H, Gunther E. IEEE International Reliability Physics Proceedings, 34th Annual, Dallas, Texas, 1996. p. 126.


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[4] Olbrich A, Ebersberger B, Boit C. Appl Phys Lett 1998; 73:3114. [5] Olbrich A, Ebersberger B, Boit C, Vancea J, Ho€mann H. European Symposium on Reliability of Electronic Devices, Failure Physics and Analysis (ESREF 1999). [6] Olbrich A, Ebersberger B, Boit C, Conference Proceedings from the 26th International Symposium for Testing and Failure Analysis (ISTFA/2000), Seattle, Washington, 2000.

[7] Criegern RV, Jahnel F, et al. J Vac Sci Technol B 1994;12:234. [8] Williams CC. Ann Rev Mater Sci 1999;29:471. [9] DeWolf P, Vandervorst W, et al. J Vac Sci Technol A 1995;13:1699. [10] Fiege G, Feige V, Phang J, Maywald M, Gorlich S, Balk L. ESREF 1998. p. 957. [11] Bae S, Schiemann K, Mertin W, Kubalek E, Maywald M. Microelectron Reliab 1999;39:975.